The present invention relates to a barrier stack used in, for example, integrated circuits (ICs) which reduces diffusion of elements, such as oxygen. More particularly, the barrier stack reduces oxidation of the plug in capacitor over plug structures.
Memory ICs comprise a plurality of memory cells interconnected by bitlines and wordlines. A memory cell includes a transistor coupled to a capacitor for storage of a bit of information. To realize high density memory ICs, the memory cells employ a capacitor over plug structure (COP), as shown in FIG. 1. The structure includes a capacitor 140 having a dielectric layer 146 located between first and second electrodes 141 and 142. The capacitor is coupled to a conductive plug 170.
Typically, a high temperature anneal in an oxygen (O2) ambient is required to improve the properties of the dielectric layer, particularly for high K dielectric and ferroelectric materials. During the anneal, O2 diffuses through the capacitor and oxidizes the plug. This can lead to performance degradation and, in some cases, failures as a result of increased plug resisitivity or electrical open connections.
To prevent diffusion of oxygen through the capacitor, a barrier layer formed from iridium is provided between the lower electrode and the plug. An adhesion layer is provided to promote adhesion between the barrier layer and interlevel dielectric layer 118, such as silicon dioxide (SiO2) or silicon nitride (SiN). Iridium is used due to its good barrier properties against O2. In conventional processing, the barrier layer and electrode have vertical grain boundaries 121 and 123 which connect at the interface 143, as shown in caption A. The connection of the vertical grain boundaries of the layers provides diffusion paths for O2. At high temperatures (e.g.,  greater than 600xc2x0 C.), O2 can easily diffuse through the grain boundaries of the barrier layer to oxidize the adhesion layer and the plug.
From the foregoing discussion, it is desirable to provide an improved barrier layer for reducing oxidation of the plug in a capacitor over plug structure.
The invention relates to an improved barrier stack for inhibiting diffusion of atoms or molecules, such as O2. Such barrier stack is particularly useful in, for example, COP structures of memory cells. In one embodiment, the barrier stack is employed in a ferroelectric capacitor. The barrier stack can also be used in other types of capacitors, such as high k dielectric capacitors.
In one embodiment, the barrier stack comprises at least first and second barrier layers in which the grain boundaries of the first and second barrier layers are mismatched. In one embodiment, the barrier layers are conductive. The barrier layers are selected from a group of barrier materials comprising Ir, Ru, Rh, Pd, or alloys thereof. The first and second barrier layers need not be formed from the same material. By providing mismatched grain boundaries, the interface of the layers block the diffusion path of oxygen.
In another embodiment, the grain boundaries of the first barrier layer are passivated with elements. In one embodiment, the grain boundaries are passivated with O2. The O2 stuff the grain boundaries of the barrier layers. Alternatively, elements larger than the grain boundaries of the barrier layer are used to passivate the grain boundaries. Such elements block the grain boundaries of the barrier layer. The grain boundaries, for example, are passivated using a rapid thermal oxidation, which also forms a thin oxide layer on the surface of the first barrier layer. Passivating the grain boundaries of the first barrier layer further enhances the barrier properties of the barrier stack. Alternatively, either all or some of the barrier layers are passivated with elements, such as O2.
The barrier stack, for example, is disposed between the plug and first or lower electrode of a capacitor structure. Optionally, an adhesion layer can be provided beneath the barrier layer.